IndiumV3, Main, Repository, bibRecord, 003539

300-GHz InAlN/GaN HEMTs With InGaN Back Barrier

Identifieur interne : 003539 ( Main/Repository ); précédent : 003538; suivant : 003540

300-GHz InAlN/GaN HEMTs With InGaN Back Barrier

Auteurs : RBID : Pascal:11-0505060

Descripteurs français

Pascal (Inist)
- Transistor mobilité électron élevée, Accommodation réseau, Gain courant, Fréquence coupure, Canal court, Hétérostructure, Transconductance, Temps retard, Nitrure de gallium, Composé binaire, Composé ternaire, Nitrure d'indium, Carbure de silicium, GaN, InGaN, SiC.

English descriptors

KwdEn :
- Binary compound, Current gain, Cut off frequency, Delay time, Gallium nitride, Heterostructures, High electron mobility transistor, Indium nitride, Mismatch lattice, Short channel, Silicon carbide, Ternary compound, Transconductance.

Abstract

This letter reports lattice-matched In_0.17Al_0.83N/ GaN high-electron-mobility transistors on a SiC substrate with a record current gain cutoff frequency ( _fT) of 300 GHz. To suppress the short-channel effects (SCEs), an In_0.15Ga_0.85N back barrier is applied in an InAlN/GaN heterostructure for the first time. The GaN channel thickness is also scaled to 26 nm, which allows a good immunity to SCEs for gate lengths down to 70 nm even with a relatively thick top barrier (9.4-10.4 nm). In a 30-nm-gate-length device with an on-resistance (R_on) of 1.2 Ω . mm and an extrinsic transconductance (g_m.ext) of 530 mS/mm, a peak f_T of 300 GHz is achieved. An electron velocity of 1.37-1.45 × 10⁷ cm/s is extracted by two different delay analysis methods.

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Pascal:11-0505060

Le document en format XML

<record><TEI><teiHeader><fileDesc><titleStmt><title xml:lang="en" level="a">300-GHz InAlN/GaN HEMTs With InGaN Back Barrier</title>
<author><name>DONG SEUP LEE</name>
<affiliation wicri:level="4"><inist:fA14 i1="01"><s1>Microsystems Technology Laboratories, Massachusetts Institute of Technology</s1>
<s2>Cambridge, MA 02139</s2>
<s3>USA</s3>
<sZ>1 aut.</sZ>
<sZ>6 aut.</sZ>
</inist:fA14>
<country>États-Unis</country>
<placeName><settlement type="city">Cambridge (Massachusetts)</settlement>
<region type="state">Massachusetts</region>
</placeName>
<orgName type="university">Massachusetts Institute of Technology</orgName>
</affiliation>
</author>
<author><name>XIANG GAO</name>
<affiliation wicri:level="1"><inist:fA14 i1="02"><s1>IQE RF LLC</s1>
<s2>Somerset, NJ 08873</s2>
<s3>USA</s3>
<sZ>2 aut.</sZ>
<sZ>3 aut.</sZ>
</inist:fA14>
<country>États-Unis</country>
<wicri:noRegion>IQE RF LLC</wicri:noRegion>
</affiliation>
</author>
<author><name>SHIPING GUO</name>
<affiliation wicri:level="1"><inist:fA14 i1="02"><s1>IQE RF LLC</s1>
<s2>Somerset, NJ 08873</s2>
<s3>USA</s3>
<sZ>2 aut.</sZ>
<sZ>3 aut.</sZ>
</inist:fA14>
<country>États-Unis</country>
<wicri:noRegion>IQE RF LLC</wicri:noRegion>
</affiliation>
</author>
<author><name sortKey="Kopp, David" uniqKey="Kopp D">David Kopp</name>
<affiliation wicri:level="1"><inist:fA14 i1="03"><s1>Department of Electrical Engineering, University of Notre Dame</s1>
<s2>Notre Dame, IN 46556</s2>
<s3>USA</s3>
<sZ>4 aut.</sZ>
<sZ>5 aut.</sZ>
</inist:fA14>
<country>États-Unis</country>
<wicri:noRegion>Notre Dame, IN 46556</wicri:noRegion>
</affiliation>
</author>
<author><name sortKey="Fay, Patrick" uniqKey="Fay P">Patrick Fay</name>
<affiliation wicri:level="1"><inist:fA14 i1="03"><s1>Department of Electrical Engineering, University of Notre Dame</s1>
<s2>Notre Dame, IN 46556</s2>
<s3>USA</s3>
<sZ>4 aut.</sZ>
<sZ>5 aut.</sZ>
</inist:fA14>
<country>États-Unis</country>
<wicri:noRegion>Notre Dame, IN 46556</wicri:noRegion>
</affiliation>
</author>
<author><name sortKey="Palacios, Tomas" uniqKey="Palacios T">Tomas Palacios</name>
<affiliation wicri:level="4"><inist:fA14 i1="01"><s1>Microsystems Technology Laboratories, Massachusetts Institute of Technology</s1>
<s2>Cambridge, MA 02139</s2>
<s3>USA</s3>
<sZ>1 aut.</sZ>
<sZ>6 aut.</sZ>
</inist:fA14>
<country>États-Unis</country>
<placeName><settlement type="city">Cambridge (Massachusetts)</settlement>
<region type="state">Massachusetts</region>
</placeName>
<orgName type="university">Massachusetts Institute of Technology</orgName>
</affiliation>
</author>
</titleStmt>
<publicationStmt><idno type="inist">11-0505060</idno>
<date when="2011">2011</date>
<idno type="stanalyst">PASCAL 11-0505060 INIST</idno>
<idno type="RBID">Pascal:11-0505060</idno>
<idno type="wicri:Area/Main/Corpus">002553</idno>
<idno type="wicri:Area/Main/Repository">003539</idno>
</publicationStmt>
<seriesStmt><idno type="ISSN">0741-3106</idno>
<title level="j" type="abbreviated">IEEE electron device lett.</title>
<title level="j" type="main">IEEE electron device letters</title>
</seriesStmt>
</fileDesc>
<profileDesc><textClass><keywords scheme="KwdEn" xml:lang="en"><term>Binary compound</term>
<term>Current gain</term>
<term>Cut off frequency</term>
<term>Delay time</term>
<term>Gallium nitride</term>
<term>Heterostructures</term>
<term>High electron mobility transistor</term>
<term>Indium nitride</term>
<term>Mismatch lattice</term>
<term>Short channel</term>
<term>Silicon carbide</term>
<term>Ternary compound</term>
<term>Transconductance</term>
</keywords>
<keywords scheme="Pascal" xml:lang="fr"><term>Transistor mobilité électron élevée</term>
<term>Accommodation réseau</term>
<term>Gain courant</term>
<term>Fréquence coupure</term>
<term>Canal court</term>
<term>Hétérostructure</term>
<term>Transconductance</term>
<term>Temps retard</term>
<term>Nitrure de gallium</term>
<term>Composé binaire</term>
<term>Composé ternaire</term>
<term>Nitrure d'indium</term>
<term>Carbure de silicium</term>
<term>GaN</term>
<term>InGaN</term>
<term>SiC</term>
</keywords>
</textClass>
</profileDesc>
</teiHeader>
<front><div type="abstract" xml:lang="en">This letter reports lattice-matched In<sub>0.17</sub>
Al<sub>0.83</sub>
N/ GaN high-electron-mobility transistors on a SiC substrate with a record current gain cutoff frequency ( <sub>f</sub>
T) of 300 GHz. To suppress the short-channel effects (SCEs), an In<sub>0.15</sub>
Ga<sub>0.85</sub>
N back barrier is applied in an InAlN/GaN heterostructure for the first time. The GaN channel thickness is also scaled to 26 nm, which allows a good immunity to SCEs for gate lengths down to 70 nm even with a relatively thick top barrier (9.4-10.4 nm). In a 30-nm-gate-length device with an on-resistance (R<sub>on</sub>
) of 1.2 Ω . mm and an extrinsic transconductance (g<sub>m.ext</sub>
) of 530 mS/mm, a peak f<sub>T</sub>
 of 300 GHz is achieved. An electron velocity of 1.37-1.45 × 10<sup>7</sup>
 cm/s is extracted by two different delay analysis methods.</div>
</front>
</TEI>
<inist><standard h6="B"><pA><fA01 i1="01" i2="1"><s0>0741-3106</s0>
</fA01>
<fA02 i1="01"><s0>EDLEDZ</s0>
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<fA03 i2="1"><s0>IEEE electron device lett.</s0>
</fA03>
<fA05><s2>32</s2>
</fA05>
<fA06><s2>11</s2>
</fA06>
<fA08 i1="01" i2="1" l="ENG"><s1>300-GHz InAlN/GaN HEMTs With InGaN Back Barrier</s1>
</fA08>
<fA11 i1="01" i2="1"><s1>DONG SEUP LEE</s1>
</fA11>
<fA11 i1="02" i2="1"><s1>XIANG GAO</s1>
</fA11>
<fA11 i1="03" i2="1"><s1>SHIPING GUO</s1>
</fA11>
<fA11 i1="04" i2="1"><s1>KOPP (David)</s1>
</fA11>
<fA11 i1="05" i2="1"><s1>FAY (Patrick)</s1>
</fA11>
<fA11 i1="06" i2="1"><s1>PALACIOS (Tomas)</s1>
</fA11>
<fA14 i1="01"><s1>Microsystems Technology Laboratories, Massachusetts Institute of Technology</s1>
<s2>Cambridge, MA 02139</s2>
<s3>USA</s3>
<sZ>1 aut.</sZ>
<sZ>6 aut.</sZ>
</fA14>
<fA14 i1="02"><s1>IQE RF LLC</s1>
<s2>Somerset, NJ 08873</s2>
<s3>USA</s3>
<sZ>2 aut.</sZ>
<sZ>3 aut.</sZ>
</fA14>
<fA14 i1="03"><s1>Department of Electrical Engineering, University of Notre Dame</s1>
<s2>Notre Dame, IN 46556</s2>
<s3>USA</s3>
<sZ>4 aut.</sZ>
<sZ>5 aut.</sZ>
</fA14>
<fA20><s1>1525-1527</s1>
</fA20>
<fA21><s1>2011</s1>
</fA21>
<fA23 i1="01"><s0>ENG</s0>
</fA23>
<fA43 i1="01"><s1>INIST</s1>
<s2>222V</s2>
<s5>354000505574470190</s5>
</fA43>
<fA44><s0>0000</s0>
<s1>© 2011 INIST-CNRS. All rights reserved.</s1>
</fA44>
<fA45><s0>16 ref.</s0>
</fA45>
<fA47 i1="01" i2="1"><s0>11-0505060</s0>
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<fA60><s1>P</s1>
</fA60>
<fA61><s0>A</s0>
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<fA64 i1="01" i2="1"><s0>IEEE electron device letters</s0>
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<fA66 i1="01"><s0>USA</s0>
</fA66>
<fC01 i1="01" l="ENG"><s0>This letter reports lattice-matched In<sub>0.17</sub>
Al<sub>0.83</sub>
N/ GaN high-electron-mobility transistors on a SiC substrate with a record current gain cutoff frequency ( <sub>f</sub>
T) of 300 GHz. To suppress the short-channel effects (SCEs), an In<sub>0.15</sub>
Ga<sub>0.85</sub>
N back barrier is applied in an InAlN/GaN heterostructure for the first time. The GaN channel thickness is also scaled to 26 nm, which allows a good immunity to SCEs for gate lengths down to 70 nm even with a relatively thick top barrier (9.4-10.4 nm). In a 30-nm-gate-length device with an on-resistance (R<sub>on</sub>
) of 1.2 Ω . mm and an extrinsic transconductance (g<sub>m.ext</sub>
) of 530 mS/mm, a peak f<sub>T</sub>
 of 300 GHz is achieved. An electron velocity of 1.37-1.45 × 10<sup>7</sup>
 cm/s is extracted by two different delay analysis methods.</s0>
</fC01>
<fC02 i1="01" i2="X"><s0>001D03F04</s0>
</fC02>
<fC02 i1="02" i2="X"><s0>001D03F02</s0>
</fC02>
<fC03 i1="01" i2="X" l="FRE"><s0>Transistor mobilité électron élevée</s0>
<s5>01</s5>
</fC03>
<fC03 i1="01" i2="X" l="ENG"><s0>High electron mobility transistor</s0>
<s5>01</s5>
</fC03>
<fC03 i1="01" i2="X" l="SPA"><s0>Transistor movibilidad elevada electrones</s0>
<s5>01</s5>
</fC03>
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<s5>02</s5>
</fC03>
<fC03 i1="02" i2="X" l="ENG"><s0>Mismatch lattice</s0>
<s5>02</s5>
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<fC03 i1="02" i2="X" l="SPA"><s0>Acomodación red</s0>
<s5>02</s5>
</fC03>
<fC03 i1="03" i2="X" l="FRE"><s0>Gain courant</s0>
<s5>03</s5>
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<s5>03</s5>
</fC03>
<fC03 i1="03" i2="X" l="SPA"><s0>Ganancia corriente</s0>
<s5>03</s5>
</fC03>
<fC03 i1="04" i2="X" l="FRE"><s0>Fréquence coupure</s0>
<s5>04</s5>
</fC03>
<fC03 i1="04" i2="X" l="ENG"><s0>Cut off frequency</s0>
<s5>04</s5>
</fC03>
<fC03 i1="04" i2="X" l="SPA"><s0>Frecuencia corte</s0>
<s5>04</s5>
</fC03>
<fC03 i1="05" i2="X" l="FRE"><s0>Canal court</s0>
<s5>05</s5>
</fC03>
<fC03 i1="05" i2="X" l="ENG"><s0>Short channel</s0>
<s5>05</s5>
</fC03>
<fC03 i1="05" i2="X" l="SPA"><s0>Canal corto</s0>
<s5>05</s5>
</fC03>
<fC03 i1="06" i2="3" l="FRE"><s0>Hétérostructure</s0>
<s5>06</s5>
</fC03>
<fC03 i1="06" i2="3" l="ENG"><s0>Heterostructures</s0>
<s5>06</s5>
</fC03>
<fC03 i1="07" i2="X" l="FRE"><s0>Transconductance</s0>
<s5>07</s5>
</fC03>
<fC03 i1="07" i2="X" l="ENG"><s0>Transconductance</s0>
<s5>07</s5>
</fC03>
<fC03 i1="07" i2="X" l="SPA"><s0>Transconductancia</s0>
<s5>07</s5>
</fC03>
<fC03 i1="08" i2="X" l="FRE"><s0>Temps retard</s0>
<s5>08</s5>
</fC03>
<fC03 i1="08" i2="X" l="ENG"><s0>Delay time</s0>
<s5>08</s5>
</fC03>
<fC03 i1="08" i2="X" l="SPA"><s0>Tiempo retardo</s0>
<s5>08</s5>
</fC03>
<fC03 i1="09" i2="X" l="FRE"><s0>Nitrure de gallium</s0>
<s5>22</s5>
</fC03>
<fC03 i1="09" i2="X" l="ENG"><s0>Gallium nitride</s0>
<s5>22</s5>
</fC03>
<fC03 i1="09" i2="X" l="SPA"><s0>Galio nitruro</s0>
<s5>22</s5>
</fC03>
<fC03 i1="10" i2="X" l="FRE"><s0>Composé binaire</s0>
<s5>23</s5>
</fC03>
<fC03 i1="10" i2="X" l="ENG"><s0>Binary compound</s0>
<s5>23</s5>
</fC03>
<fC03 i1="10" i2="X" l="SPA"><s0>Compuesto binario</s0>
<s5>23</s5>
</fC03>
<fC03 i1="11" i2="X" l="FRE"><s0>Composé ternaire</s0>
<s5>24</s5>
</fC03>
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<s5>24</s5>
</fC03>
<fC03 i1="11" i2="X" l="SPA"><s0>Compuesto ternario</s0>
<s5>24</s5>
</fC03>
<fC03 i1="12" i2="X" l="FRE"><s0>Nitrure d'indium</s0>
<s5>25</s5>
</fC03>
<fC03 i1="12" i2="X" l="ENG"><s0>Indium nitride</s0>
<s5>25</s5>
</fC03>
<fC03 i1="12" i2="X" l="SPA"><s0>Indio nitruro</s0>
<s5>25</s5>
</fC03>
<fC03 i1="13" i2="X" l="FRE"><s0>Carbure de silicium</s0>
<s5>26</s5>
</fC03>
<fC03 i1="13" i2="X" l="ENG"><s0>Silicon carbide</s0>
<s5>26</s5>
</fC03>
<fC03 i1="13" i2="X" l="SPA"><s0>Silicio carburo</s0>
<s5>26</s5>
</fC03>
<fC03 i1="14" i2="X" l="FRE"><s0>GaN</s0>
<s4>INC</s4>
<s5>82</s5>
</fC03>
<fC03 i1="15" i2="X" l="FRE"><s0>InGaN</s0>
<s4>INC</s4>
<s5>83</s5>
</fC03>
<fC03 i1="16" i2="X" l="FRE"><s0>SiC</s0>
<s4>INC</s4>
<s5>84</s5>
</fC03>
<fC07 i1="01" i2="X" l="FRE"><s0>Composé III-V</s0>
<s5>09</s5>
</fC07>
<fC07 i1="01" i2="X" l="ENG"><s0>III-V compound</s0>
<s5>09</s5>
</fC07>
<fC07 i1="01" i2="X" l="SPA"><s0>Compuesto III-V</s0>
<s5>09</s5>
</fC07>
<fN21><s1>346</s1>
</fN21>
<fN44 i1="01"><s1>OTO</s1>
</fN44>
<fN82><s1>OTO</s1>
</fN82>
</pA>
</standard>
</inist>
</record>

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300-GHz InAlN/GaN HEMTs With InGaN Back Barrier

300-GHz InAlN/GaN HEMTs With InGaN Back Barrier

Descripteurs français

English descriptors

Abstract

Links toward previous steps (curation, corpus...)

Links to Exploration step

Le document en format XML

Pour manipuler ce document sous Unix (Dilib)

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